CS/COE 536
Fall 2002 Reconfigurable System On Chip Design J. W. Lockwood

Assignment Schedule

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CS/COE 536: Schedule

Monday	Wednesday
Laboratory: Sever 201	Lecture: Couples II 100
	Wed. Aug 28 First Day of Class Lecture 1: Motivation for Reconfigurable System On Chip (SOC) Assign Reading: Embedded System Design: Chapter 1 Surviving the SOC Revolution: Chapter 1 A reference model for firewall technology Homework 1 Assigned
Mon. Sep 2 Labor Day (No Class)	Wed. Sep 4 (Lecture) Lecture 2: VHDL and State Machines for processing Protocols Lecture 3: Packet processing on the FPX and CAMs Assigned Reading: Introductory VHDL: Chapters 1, 2, and 3. Fast Routing Table Lookup Using CAMs Machine Problem 1 Assigned
Mon. Sep 9: (Lab) First Lab: Meet in Sever 201 Lecture 4: Machine Problem 1 Assignment Assigned Reading: Embedded System Design, Chapter 2 Introductory VHDL: Chapters 4 and 5 (Only sections 4.1, 5.1-5.8) Homework 1 Due - Tue, 5pm	Wed. Sep 11 (Lecture) Lecture 5: Evaluation and Testing of Machines Problems for CS536 Assigned Reading: Introductory VHDL: Chapters 6 and 7 (Only sections 6.1-6.2, 7.1-7.10)
Mon. Sep 16: (Lab) Lab: Machine Problem 1 Assigned Reading: Embedded System Design: Chapter 8, Sections 8.1-8.8	Wed. Sep 18 (Lecture) Lecture 6: Content-based Packet Processing in reconfigurable hardware Assigned Reading: Embedded System Design: Chapter 8, Sections 8.9-8.17 Machine Problem 1 Due - Wed, Noon Homework 2 Assigned
Mon. Sep 23: (Lab) Lecture 7: Implementation of the SPAM filter Assigned Reading: Embedded System Design: Chapter 5, Sections 5.1-5.3 Machine Problem 2 Assigned	Wed. Sep 25 (Lecture) Lecture 8: Class-based and Flow-based Queuing Systems Assigned Reading: Embedded System Design: Chapter 5, Sections 5.4-5.8 Homework 2 Due: Thr, 5pm
Mon. Sep 30: (Lab) Lecture 9: System-Level Design with Automatically Generated Cores Assigned Reading: Embedded System Design: Chapter 6, Sections 6.1-6.5 Machine Problem 2 Due - Tue, 5pm	Wed. Oct 2 (Lecture) Lecture 10: Custom, ASIC, and FPGA Circuit Implementations Assigned Reading: Embedded System Design: Chapter 6, Sections 6.6-6.13 Homework 3 Assigned
Mon. Oct 7: (Lab) Lecture 11: Implementation of Hybrid Priority and Per-Flow Queuing Systems in Reconfigurable Hardware Assigned Reading: Embedded System Design: Chapter 10 Katherine Compton, Scott Hauck Totem: Custom Reconfigurable Array Generation IEEE Symposium on FPGAs for Custom Computing Machines Conference (FCCM), 2001. Machine Problem 3 - Part 1 Assigned	Wed. Oct 9 (Lecture) Lecture 12: Random Access Memory Friday Colloquium (Distinguished Speaker) Scott Hauck: University of Washington Domain-Specific FPGA Generation Friday, Oct. 11, 11am Cupples II, Room 217 Group meeting with graduate students and CS536 class Friday, Oct. 11, 4:15pm-5:00pm, Bryan 509c (CS Conference Room)
Mon. Oct 14: (Lab) Lab: Machine Problem 3 Machine Problem 3 - Part 2 Assigned Homework 3 Due: Tue, 5pm	Wed. Oct 16 (Lecture) Lecture 13: Hybrid Reconfigurable Systems Project Assigned Machine Problem 3, Part 1 Due, Thr 5pm Assigned Reading: Seth Copen Goldstein, Herman Schmit, Mihai Budiu, Srihari Cadambi, Matt Moe, and Reed Taylor, PipeRench: A Reconfigurable Architecture and Compiler in IEEE Computer, Vol.33, No. 4, April 2000
Mon. Oct 21: (Lab) Assigned Reading: H. Schmit, B. Levine and B. Ylvisaker, Queue Machines: Hardware Compilation in Hardware, in IEEE Symposium on Field Programmable Custom Computing Machines (FCCM), April 2002 Homework 4 Assigned Project Abstract and Signup Due	Wed. Oct 23 (Lecture) Lecture 14: Final Projects Project proposal presentations Friday Colloquia (Distinguished Speaker) Herman Schmit, CMU Pipes, Queues and other Abstractions for Reconfigurable Computing Friday, Oct. 25, 11am Cupples II, Room 217 Group meeting with graduate students and CS536 class Friday, Oct. 25, 1:30-2:30pm Bryan 509c (CS Conference Room)
Mon. Oct 28 - (Lab) Lecture 15: Midterm Notes and Issues for Final Project Integration Project proposal presentations (continued) Homework 4 Due: Tue, 5pm	Wed. Oct 30 - (Lecture) Machine Problem 3, Part 2 Due, Thr 5pm Assigned Reading Brad Hutchings, Peter Bellows, Joseph Hawkins, Scott Hemmert, Brent Nelson, Mike Rytting, A CAD Suite for High-Performance FPGA Design, FCCM 1999.
Mon. Nov 4: (Lab) Lecture 16: Alternative Tools for Hardware Design Project plan presentations Project Design Plan Due Submit revised PPT slides based on template. Homework 5 Assigned	Wed. Nov 6 - (Lecture) Status Report 1 Presentations Friday Colloquia (Distinguished Speaker) Brad Hutchings, BYU Reconfigurable Computing: Development Environments and Applications Friday, Nov. 8, 11am Cupples II, room 217 Group meeting with graduate students and CS536 class Friday, Nov. 8, 1:30 pm Bryan 509c Homework 5 Due: Fri, 5pm
Mon. Nov 11: (Lab) Status Report 1 Due Submit status report based on Template Also Submit revised PPT slides based on template. Status Report 1 Presentations	Wed. Nov 13 (Lecture) Midterm Exam
Mon. Nov 18 - (Lab) Status Report 2 Due Submit revised status report based on Template Also Submit revised PPT slides based on template. Status Report 2 Presentations	Wed. Nov 20 - (Lecture) Return and discuss Midterm Exam
Mon. Nov 25: Status Report 2 Presentations Status Report 3 Due Submit revised status report based on Template Also Submit revised PPT slides based on template. Status Report 3 Presentations	Wed. Nov 27 Thanksgiving Break (No Class)
Mon. Dec 2 (Lab) Lecture 17: Final Project Testing, Integration, and Submission Meet in Laboratory for demonstrations of simulation and hardware.	Wed. Dec 4 (Lecture) Lecture 18: Submitting Projects to the Integration Server Read Integration Server Worksheet
Mon. Dec 9 - Final System Demonstration Final Project Submission Due	Wed. Dec 11: Lab - Final: Lab Final Project Writeup Due Project Presentations (1) Fri, December 13, 2002 4pm to 6pm: Project Presentations (2) DAC Submissions Due

Monday Wednesday

Laboratory: Sever 201 Lecture: Couples II 100

Wed. Aug 28

First Day of Class
Lecture 1: Motivation for Reconfigurable System On Chip (SOC)
Assign Reading:

Embedded System Design: Chapter 1
Surviving the SOC Revolution: Chapter 1
A reference model for firewall technology

Homework 1 Assigned

Mon. Sep 2

Labor Day (No Class)
Wed. Sep 4 (Lecture)

Lecture 2: VHDL and State Machines for processing Protocols
Lecture 3: Packet processing on the FPX and CAMs
Assigned Reading:

Introductory VHDL: Chapters 1, 2, and 3.
Fast Routing Table Lookup Using CAMs

Machine Problem 1 Assigned

Mon. Sep 9: (Lab)

First Lab: Meet in Sever 201
Lecture 4: Machine Problem 1 Assignment
Assigned Reading:

Embedded System Design, Chapter 2
Introductory VHDL: Chapters 4 and 5
(Only sections 4.1, 5.1-5.8)

Homework 1 Due - Tue, 5pm
Wed. Sep 11 (Lecture)

Lecture 5: Evaluation and Testing of Machines Problems for CS536
Assigned Reading:

Introductory VHDL: Chapters 6 and 7
(Only sections 6.1-6.2, 7.1-7.10)

Mon. Sep 16: (Lab)

Lab: Machine Problem 1
Assigned Reading:

Embedded System Design:
Chapter 8, Sections 8.1-8.8

Wed. Sep 18 (Lecture)

Lecture 6: Content-based Packet Processing in reconfigurable hardware
Assigned Reading:

Embedded System Design:
Chapter 8, Sections 8.9-8.17

Machine Problem 1 Due - Wed, Noon
Homework 2 Assigned

Mon. Sep 23: (Lab)

Lecture 7: Implementation of the SPAM filter
Assigned Reading:

Embedded System Design:
Chapter 5, Sections 5.1-5.3

Machine Problem 2 Assigned
Wed. Sep 25 (Lecture)

Lecture 8: Class-based and Flow-based Queuing Systems
Assigned Reading:

Embedded System Design:
Chapter 5, Sections 5.4-5.8
Homework 2 Due: Thr, 5pm

Mon. Sep 30: (Lab)

Lecture 9: System-Level Design with Automatically Generated Cores
Assigned Reading:

Embedded System Design:
Chapter 6, Sections 6.1-6.5

Machine Problem 2 Due - Tue, 5pm
Wed. Oct 2 (Lecture)

Lecture 10: Custom, ASIC, and FPGA Circuit Implementations
Assigned Reading:

Embedded System Design:
Chapter 6, Sections 6.6-6.13

Homework 3 Assigned

Mon. Oct 7: (Lab)

Lecture 11: Implementation of Hybrid Priority and Per-Flow Queuing Systems in Reconfigurable Hardware
Assigned Reading:

Embedded System Design: Chapter 10
Katherine Compton, Scott Hauck Totem: Custom Reconfigurable Array Generation
IEEE Symposium on FPGAs for Custom Computing Machines Conference (FCCM), 2001.

Machine Problem 3 - Part 1 Assigned
Wed. Oct 9 (Lecture)

Lecture 12: Random Access Memory
Friday Colloquium (Distinguished Speaker)

Scott Hauck: University of Washington
Domain-Specific FPGA Generation

Friday, Oct. 11, 11am
Cupples II, Room 217

Group meeting with graduate students and CS536 class

Friday, Oct. 11, 4:15pm-5:00pm,
Bryan 509c (CS Conference Room)

Mon. Oct 14: (Lab)

Lab: Machine Problem 3
Machine Problem 3 - Part 2 Assigned
Homework 3 Due: Tue, 5pm
Wed. Oct 16 (Lecture)

Lecture 13: Hybrid Reconfigurable Systems
Project Assigned
Machine Problem 3, Part 1
Due, Thr 5pm
Assigned Reading:

Seth Copen Goldstein, Herman Schmit, Mihai Budiu, Srihari Cadambi, Matt Moe, and Reed Taylor, PipeRench: A Reconfigurable Architecture and Compiler in IEEE Computer, Vol.33, No. 4, April 2000

Mon. Oct 21: (Lab)

Assigned Reading:

H. Schmit, B. Levine and B. Ylvisaker, Queue Machines: Hardware Compilation in Hardware, in IEEE Symposium on Field Programmable Custom Computing Machines (FCCM), April 2002

Homework 4 Assigned
Project Abstract and Signup Due
Wed. Oct 23 (Lecture)

Lecture 14: Final Projects

Project proposal presentations

Friday Colloquia (Distinguished Speaker)

Herman Schmit, CMU
Pipes, Queues and other Abstractions for Reconfigurable Computing

Friday, Oct. 25, 11am
Cupples II, Room 217

Group meeting with graduate students and CS536 class

Friday, Oct. 25, 1:30-2:30pm
Bryan 509c (CS Conference Room)

Mon. Oct 28 - (Lab)

Lecture 15: Midterm Notes and Issues for Final Project Integration
Project proposal presentations (continued)

Homework 4 Due: Tue, 5pm
Wed. Oct 30 - (Lecture)

Machine Problem 3, Part 2
Due, Thr 5pm
Assigned Reading

Brad Hutchings, Peter Bellows, Joseph Hawkins, Scott Hemmert, Brent Nelson, Mike Rytting, A CAD Suite for High-Performance FPGA Design, FCCM 1999.

Mon. Nov 4: (Lab)

Lecture 16: Alternative Tools for Hardware Design
Project plan presentations

Project Design Plan Due

Submit revised PPT slides based on template.

Homework 5 Assigned
Wed. Nov 6 - (Lecture)

Status Report 1 Presentations
Friday Colloquia (Distinguished Speaker)

Brad Hutchings, BYU
Reconfigurable Computing: Development Environments and Applications

Friday, Nov. 8, 11am
Cupples II, room 217

Group meeting with graduate students and CS536 class

Friday, Nov. 8, 1:30 pm
Bryan 509c

Homework 5 Due: Fri, 5pm

Mon. Nov 11: (Lab)

Status Report 1 Due

Submit status report based on Template
Also Submit revised PPT slides based on template.

Status Report 1 Presentations
Wed. Nov 13 (Lecture)

Midterm Exam

Mon. Nov 18 - (Lab)

Status Report 2 Due

Submit revised status report based on Template
Also Submit revised PPT slides based on template.

Status Report 2 Presentations
Wed. Nov 20 - (Lecture)

Return and discuss Midterm Exam

Mon. Nov 25: Status Report 2 Presentations

Status Report 3 Due

Submit revised status report based on Template
Also Submit revised PPT slides based on template.

Status Report 3 Presentations
Wed. Nov 27

Thanksgiving Break (No Class)

Mon. Dec 2 (Lab)

Lecture 17: Final Project Testing, Integration, and Submission
Meet in Laboratory for demonstrations
of simulation and hardware.
Wed. Dec 4 (Lecture)

Lecture 18: Submitting Projects to the Integration Server
Read Integration Server Worksheet

Mon. Dec 9 - Final System Demonstration

Final Project Submission Due
Wed. Dec 11: Lab - Final: Lab

Final Project Writeup Due
Project Presentations (1)

Fri, December 13, 2002 4pm to 6pm:

Project Presentations (2)
DAC Submissions Due

Copyright 2002
John W. Lockwood
Washington University
Saint Louis, MO