| CSE 565M Fall 2005 |
Acceleration of Network Gaming Algorithms in Reconfigurable Hardware |
J. W. Lockwood |
The online worlds of Massively Multiplayer Online Games (MMOGs) connect thousands of users and place ever greater demands on the servers hosting the games. Currently, server capability and available end-user bandwidth limit the number of concurrent players that can participate in a single online game. The bandwidth issue is gradually being resolved by the numerous fiber optic cable rollouts currently in progress by most of the major telecommunications companies. However, the newly created potential for larger amounts of bandwidth per player will only amplify existing server limitations. As the number of players grows it becomes increasingly difficult for online servers to quickly process the enormous number of data packets needed to synchronize each player's action with the actions performed by each of the other players.
In order for networking systems to operate at high speeds, data processing components can be implemented in hardware. CSE565M will explore the techniques of migrating networking algorithms from software to hardware.
The Field Programmable Gate Array (FPGA) is a special type of reconfigurable Integrated Circuit (IC). Today's FPGAs contains millions of logic gates. But rather than just using the logic to issue software instructions as is done on a microprocessor like a Pentium 4, and FPGA allows the operation of the underlying gates in the chip to be reconfigured. The FPGA offers significant speed advantages over ICs because computation can be performed with parallel hardware.
For computer gaming, customized circuits can be implemented on the FPGA to accelerate the processing of gaming packets. By implementing a customized hardware to processes the packets received from and sent to each player in an on-line game, the latency (delay) in which packets are processed significantly decreases. This should make the on-line game feel much more interactive. Likewise, the throughput (number of packets which can be processed) should be increased. This allows much more players to participate in an on-line game. Together, the throughput and latency improvements should vastly improve the on-line experience. In CSE565, gaming servers will be developed to efficiently process network packets and content with the help of FPGA hardware.
If the projects implemented in the course are successful, we anticipate that there could be a significant impact on the computer gaming industry. By hardware accelerating the processing of gaming packets, a single server could replace the function on an entire cluster. A new business model for on-line gaming could emerge. As gaming companies compete to provide better, faster, larger games to differentiate themselves from their competitors, our hardware-accelerated gaming server could be "the next big thing".